[all-commits] [llvm/llvm-project] e82e4f: [MIPS} Address ISel failures for 64 bit fpus in mi...

[sdardis via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e82e4fa7ef717b95eb3abf45a6f2a3571e6bc468
      https://github.com/llvm/llvm-project/commit/e82e4fa7ef717b95eb3abf45a6f2a3571e6bc468
  Author: Simon Dardis <simon.dardis at gmail.com>
  Date:   2022-05-12 (Thu, 12 May 2022)

  Changed paths:
    M llvm/lib/Target/Mips/MicroMipsInstrFPU.td
    M llvm/lib/Target/Mips/MipsScheduleGeneric.td
    M llvm/test/CodeGen/Mips/llvm-ir/load.ll
    M llvm/test/CodeGen/Mips/llvm-ir/store.ll
    A llvm/test/CodeGen/Mips/pr49200.ll

  Log Message:
  -----------
  [MIPS} Address ISel failures for 64 bit fpus in microMIPS

Add the instructions and patterns for loads and stores in microMIPSr3
when a 64 bit FPU is present. Previously, this would lead to an
instruction selection failure.

This resolves PR/49200.

Thanks to jdeguire for reporting the issue!

Differential Revision: https://reviews.llvm.org/D124723