[all-commits] [llvm/llvm-project] 75e50f: Use update_llc_test_checks for the switch.ll test; ...

[Matthias Braun via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 75e50f70c6fd461cae915fc4983faf4127a6059f
      https://github.com/llvm/llvm-project/commit/75e50f70c6fd461cae915fc4983faf4127a6059f
  Author: Matthias Braun <matze at braunis.de>
  Date:   2022-05-10 (Tue, 10 May 2022)

  Changed paths:
    A llvm/test/CodeGen/X86/switch-phi-const.ll
    M llvm/test/CodeGen/X86/switch.ll

  Log Message:
  -----------
  Use update_llc_test_checks for the switch.ll test; add new test

- Change `switch.ll` test to a style suitable for
  `tools/update_llc_test_checks.py`.
- Precommit test for upcoming changes:
  - Add `switch_i8` to `test/CodeGen/X86/switch.ll`.
  - Add `test/CodeGen/X86/switch-phi-const.ll`.

Differential Revision: https://reviews.llvm.org/D124893


  Commit: cd19af74c031f0f538050d00b26bab3fbca07414
      https://github.com/llvm/llvm-project/commit/cd19af74c031f0f538050d00b26bab3fbca07414
  Author: Matthias Braun <matze at braunis.de>
  Date:   2022-05-10 (Tue, 10 May 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
    M llvm/test/CodeGen/X86/SwitchLowering.ll
    M llvm/test/CodeGen/X86/conditional-tailcall.ll
    M llvm/test/CodeGen/X86/switch-phi-const.ll
    M llvm/test/CodeGen/X86/switch.ll
    M llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
    M llvm/test/CodeGen/X86/tail-opts.ll
    M llvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll

  Log Message:
  -----------
  Avoid 8 and 16bit switch conditions on x86

This adds a `TargetLoweringBase::getSwitchConditionType` callback to
give targets a chance to control the type used in
`CodeGenPrepare::optimizeSwitchInst`.

Implement callback for X86 to avoid i8 and i16 types where possible as
they often incur extra zero-extensions.

This is NFC for non-X86 targets.

Differential Revision: https://reviews.llvm.org/D124894


  Commit: f0ea9c9cec7f7b632ef7894ff7b3859269de611b
      https://github.com/llvm/llvm-project/commit/f0ea9c9cec7f7b632ef7894ff7b3859269de611b
  Author: Matthias Braun <matze at braunis.de>
  Date:   2022-05-10 (Tue, 10 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
    M llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
    M llvm/test/CodeGen/X86/switch-phi-const.ll
    A llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll

  Log Message:
  -----------
  CodeGenPrepare: Replace constant PHI arguments with switch condition value

We often see code like the following after running SCCP:

    switch (x) { case 42: phi(42, ...); }

This tends to produce bad code as we currently materialize the constant
phi-argument in the switch-block. This increases register pressure and
if the pattern repeats for `n` case statements, we end up generating `n`
constant values.

This changes CodeGenPrepare to catch this pattern and revert it back to:

    switch (x) { case 42: phi(x, ...); }

Differential Revision: https://reviews.llvm.org/D124552


Compare: https://github.com/llvm/llvm-project/compare/3137ca80b9ef...f0ea9c9cec7f