[all-commits] [llvm/llvm-project] f14a1f: Revert "[RISCV][SelectionDAG] Support VECREDUCE_AD...

[WangLian via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f14a1f26ade3786d3cda566a1c38f92f7fbb24b3
      https://github.com/llvm/llvm-project/commit/f14a1f26ade3786d3cda566a1c38f92f7fbb24b3
  Author: Lian Wang <Lian.Wang at streamcomputing.com>
  Date:   2022-05-10 (Tue, 10 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll

  Log Message:
  -----------
  Revert "[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation"

This patch make CodeGen/test/AArch64/vecreduce-add-legalization.ll fail.

This reverts commit 17a8a1bb7126a7c1b0bc629d9299f2e5ae6db3f1.