[all-commits] [llvm/llvm-project] 1a2665: [AArch64][SVE] Improve codegen when extracting fir...

[RosieSumpter via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1a2665902f128155fa1febafea990ebaee9476f2
      https://github.com/llvm/llvm-project/commit/1a2665902f128155fa1febafea990ebaee9476f2
  Author: Rosie Sumpter <rosie.sumpter at arm.com>
  Date:   2022-05-09 (Mon, 09 May 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-cmp-folds.ll

  Log Message:
  -----------
  [AArch64][SVE] Improve codegen when extracting first lane of active lane mask

When extracting the first lane of a predicate created using the
llvm.get.active.lane.mask intrinsic, it should give the same codegen as
when the predicate is created using the llvm.aarch64.sve.whilelo
intrinsic, since get.active.lane.mask is lowered to whilelo. This patch
ensures the codegen is the same by recognizing
llvm.get.active.lane.mask as a flag-setting operation in this case.

Differential Revision: https://reviews.llvm.org/D125215