[all-commits] [llvm/llvm-project] f48611: [riscv] Add strict asserts for VSETVLI insertion a...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f486119ce94573793c1569f1542c09fae74a0d1d
      https://github.com/llvm/llvm-project/commit/f486119ce94573793c1569f1542c09fae74a0d1d
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-05-06 (Fri, 06 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  -----------
  [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs

This assertion should hold for any reasonable data flow algorithm, but is known not to in several cases today. I'd like to go ahead and land this off-by-default, so that we can collaborate on fixes and have a common definition of success.

Differential: https://reviews.llvm.org/D125035