[all-commits] [llvm/llvm-project] 115c18: [DAG][PowerPC] Combine shuffle(bitcast(X), Mask) t...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 115c1888077ceff05b827a1b254d24abd6ee2b41
      https://github.com/llvm/llvm-project/commit/115c1888077ceff05b827a1b254d24abd6ee2b41
  Author: David Green <david.green at arm.com>
  Date:   2022-05-06 (Fri, 06 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/test/CodeGen/AArch64/insert-extend.ll
    M llvm/test/CodeGen/ARM/neon-copy.ll
    M llvm/test/CodeGen/ARM/vector-DAGCombine.ll
    M llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
    M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
    M llvm/test/CodeGen/PowerPC/load-and-splat.ll
    M llvm/test/CodeGen/PowerPC/vsx_shuffle_le.ll
    M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
    M llvm/test/CodeGen/Thumb2/mve-vld2-post.ll
    M llvm/test/CodeGen/Thumb2/mve-vld2.ll
    M llvm/test/CodeGen/Thumb2/mve-vst3.ll
    M llvm/test/CodeGen/Thumb2/mve-vst4.ll
    M llvm/test/CodeGen/X86/avx-vbroadcast.ll
    M llvm/test/CodeGen/X86/oddshuffles.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-2.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-2.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll

  Log Message:
  -----------
  [DAG][PowerPC] Combine shuffle(bitcast(X), Mask) to bitcast(shuffle(X, Mask'))

If the mask is made up of elements that form a mask in the higher type
we can convert shuffle(bitcast into the bitcast type, simplifying the
instruction sequence. A v4i32 2,3,0,1 for example can be treated as a
1,0 v2i64 shuffle. This helps clean up some of the AArch64 concat load
combines, along with helping simplify a number of other tests.

The PowerPC combine for v16i8 splat vector loads needed some fixes to
keep it working for v16i8 vectors. This improves the handling of v2i64
shuffles to match too, hopefully improving them in general.

Differential Revision: https://reviews.llvm.org/D123801