[all-commits] [llvm/llvm-project] 4ff5e8: [RISCV] Enable MachineOutliner by default under -O...

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4ff5e8184c665d7de6023a174fd132b20ccb8a40
      https://github.com/llvm/llvm-project/commit/4ff5e8184c665d7de6023a174fd132b20ccb8a40
  Author: wangpc <pc.wang at linux.alibaba.com>
  Date:   2022-05-06 (Fri, 06 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll

  Log Message:
  -----------
  [RISCV] Enable MachineOutliner by default under -Oz for RISCV

Enable default outlining when the function has the minsize attribute.

`addr-label.ll` crashed after enabling this, so a barrier is added before
instruction selection as a workaround.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D122213