[all-commits] [llvm/llvm-project] 747c6a: [SDAG] fix miscompile when casting int->FP->int

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 747c6a0c734e618db8132b503f432d8274cc56b5
      https://github.com/llvm/llvm-project/commit/747c6a0c734e618db8132b503f432d8274cc56b5
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-05-02 (Mon, 02 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/float-conv-elim.ll
    M llvm/test/CodeGen/X86/float-conv-elim.ll

  Log Message:
  -----------
  [SDAG] fix miscompile when casting int->FP->int

This is the codegen equivalent of D124692.

As shown in https://github.com/llvm/llvm-project/issues/55150 -
the existing fold may be wrong when converting to a signed value.
This is a quick fix to avoid the miscompile.
https://alive2.llvm.org/ce/z/KtaDmd

Differential Revision: https://reviews.llvm.org/D124771