[all-commits] [llvm/llvm-project] b48151: [SVE] Move reg+reg gather/scatter addressing optim...
paulwalker-arm via All-commits
all-commits at lists.llvm.org
Fri Apr 29 09:44:01 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: b481512485a87a5510bf28f63cc512ad26c075a8
https://github.com/llvm/llvm-project/commit/b481512485a87a5510bf28f63cc512ad26c075a8
Author: Paul Walker <paul.walker at arm.com>
Date: 2022-04-29 (Fri, 29 Apr 2022)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
Log Message:
-----------
[SVE] Move reg+reg gather/scatter addressing optimisations from lowering into DAG combine.
This is essentially a refactoring patch but allows more cases to
be caught, hence the output changes to some tests.
Differential Revision: https://reviews.llvm.org/D122994
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