[all-commits] [llvm/llvm-project] 4a31af: [MC][AArch64] Enable '+v8a' when nothing specified...

[Tommy Chiang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a31af88a26726f4662a2923618fe45977d09356
      https://github.com/llvm/llvm-project/commit/4a31af88a26726f4662a2923618fe45977d09356
  Author: CHIANG, YU-HSUN (Tommy Chiang, oToToT) <ty1208chiang at gmail.com>
  Date:   2022-04-29 (Fri, 29 Apr 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
    M llvm/test/MC/AArch64/arm64-branch-encoding.s
    M llvm/test/MC/AArch64/arm64-system-encoding.s
    M llvm/test/MC/AArch64/basic-a64-instructions.s
    M llvm/test/MC/Disassembler/AArch64/arm64-branch.txt
    M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt

  Log Message:
  -----------
  [MC][AArch64] Enable '+v8a' when nothing specified for MCSubtargetInfo

Since D110065, the 'R' profile support is added to LLVM. It turns the
`generic` cpu into the intersection of v8-a and v8-r. However, this
makes some backward compatibility problems. The original patch makes
the clang driver implicitly pass -march=armv8-a when only the triple
is specified. Since it only applies to clang, other tools like
llvm-objdump still faces the backward compatibility problem.

This patch applies the same idea to MC related tools by enabling '+v8a'
feature when nothing is specified (both CPU and FS are empty) for
MCSubtargetInfo creation.

This patch should fix PR53956.

Reviewed by: labrinea

Differential Revision: https://reviews.llvm.org/D124319