[all-commits] [llvm/llvm-project] e617d1: llvm-reduce: Fix mangling types of generic registers

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e617d1a1d7f61bc639dd109e9844ebd3495333de
      https://github.com/llvm/llvm-project/commit/e617d1a1d7f61bc639dd109e9844ebd3495333de
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-04-27 (Wed, 27 Apr 2022)

  Changed paths:
    M llvm/test/tools/llvm-reduce/mir/generic-vreg.mir
    M llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp

  Log Message:
  -----------
  llvm-reduce: Fix mangling types of generic registers