[all-commits] [llvm/llvm-project] 7a21a0: [RISCV] Add sched to pseudo function call instruct...
Wang Pengcheng via All-commits
all-commits at lists.llvm.org
Sat Apr 23 23:58:47 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7a21a0525a696f17e6d6915c7515a30c0bda259a
https://github.com/llvm/llvm-project/commit/7a21a0525a696f17e6d6915c7515a30c0bda259a
Author: wangpc <pc.wang at linux.alibaba.com>
Date: 2022-04-24 (Sun, 24 Apr 2022)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Add sched to pseudo function call instructions
To fix llvm-mca's error of 'found an unsupported instruction
in the input assembly sequence.' caused by the lack of
scheduling info.
Pseudo function call instructions will be expanded to `auipc`
and `jalr`, so their scheduling info are the combination of
two.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D123578
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