[all-commits] [llvm/llvm-project] 0ecbb6: TableGen/GlobalISel: Make address space/align pred...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0ecbb683a2faf0ec5bcb9eb472ebd9921cbe683a
      https://github.com/llvm/llvm-project/commit/0ecbb683a2faf0ec5bcb9eb472ebd9921cbe683a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-04-22 (Fri, 22 Apr 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/test/TableGen/address-space-patfrags.td
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Make address space/align predicates consistent

The builtin predicate handling has a strange behavior where the code
assumes that a PatFrag is a stack of PatFrags, and each level adds at
most one predicate. I don't think this particularly makes sense,
especially without a diagnostic to ensure you aren't trying to set
multiple at once.

This wasn't followed for address spaces and alignment, which could
potentially fall through to report no builtin predicate was
added. Just switch these to follow the existing convention for now.