[all-commits] [llvm/llvm-project] e1afae: [AArch64][SVE] Add some logical operation Destruct...

[Allen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e1afae0311b6ace0c3c4c265022335988f10bed7
      https://github.com/llvm/llvm-project/commit/e1afae0311b6ace0c3c4c265022335988f10bed7
  Author: zhongyunde <zhongyunde at huawei.com>
  Date:   2022-04-22 (Fri, 22 Apr 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.ll

  Log Message:
  -----------
  [AArch64][SVE] Add some logical operation DestructiveBinaryComm patterns

Add DestructiveBinaryComm* patterns for ORR, EOR, AND and BIC.
The above instructions requires that the source and destination registers are
equal, so use movprfx should be beneficial to performance.
note: BIC (i.e. A & ~B) is not a commutative operation.

Reviewed By: paulwalker-arm, david-arm

Differential Revision: https://reviews.llvm.org/D124224