[all-commits] [llvm/llvm-project] be5c15: [NFC][Costmodel][LV][X86] Refresh one or two inter...

Roman Lebedev via All-commits all-commits at lists.llvm.org
Fri Apr 15 07:43:50 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: be5c15c7aee1ef4964c88031555ed6b0f59ebc23
      https://github.com/llvm/llvm-project/commit/be5c15c7aee1ef4964c88031555ed6b0f59ebc23
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2022-04-15 (Fri, 15 Apr 2022)

  Changed paths:
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-4.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-7.ll
    A llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-8.ll

  Log Message:
  -----------
  [NFC][Costmodel][LV][X86] Refresh one or two interleaved load/store tests




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