[all-commits] [llvm/llvm-project] 1e803d: Revert rG88ff6f70c45f2767576c64dde28cbfe7a90916ca ...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Mon Apr 11 02:43:16 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 1e803d305ac5404c76169c89f4a442204c595dd8
https://github.com/llvm/llvm-project/commit/1e803d305ac5404c76169c89f4a442204c595dd8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2022-04-11 (Mon, 11 Apr 2022)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
Revert rG88ff6f70c45f2767576c64dde28cbfe7a90916ca "[X86] Extend vselect(cond, pshufb(x), pshufb(y)) -> or(pshufb(x), pshufb(y)) to include inner or(pshufb(x), pshufb(y)) chains"
Reverting while I investigate reports of internal test regressions/failures
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