[all-commits] [llvm/llvm-project] afa1ae: [InstCombine] SimplifyDemandedUseBits - allow and(...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afa1ae9e0c0bb7bacca65ebd43ecb21d3848bbe4
      https://github.com/llvm/llvm-project/commit/afa1ae9e0c0bb7bacca65ebd43ecb21d3848bbe4
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-04-07 (Thu, 07 Apr 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/2008-07-11-RemAnd.ll

  Log Message:
  -----------
  [InstCombine] SimplifyDemandedUseBits - allow and(srem(X,Pow2),C) -> and(X,C) to work on vector types

Replace m_ConstantInt with m_APInt to match uniform (no-undef) vector remainder amounts.