[all-commits] [llvm/llvm-project] f89112: [RISCV] Add CMOV isel pattern for (select (setgt X...

[LiqinWeng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f8911235566865f2b81675d62634d05cecc0d143
      https://github.com/llvm/llvm-project/commit/f8911235566865f2b81675d62634d05cecc0d143
  Author: Liqin Weng <Liqin.Weng at streamcomputing.com>
  Date:   2022-04-07 (Thu, 07 Apr 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv32zbt.ll
    M llvm/test/CodeGen/RISCV/rv64zbt.ll
    M llvm/test/CodeGen/RISCV/select-cc.ll

  Log Message:
  -----------
  [RISCV] Add CMOV isel pattern for (select (setgt X, Imm), Y, Z)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D122644