[all-commits] [llvm/llvm-project] 5b5f59: [DAGCombiner] Replace call getSExtOrTrunc with a t...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b5f59428cc6f28bdc37fbf5fc375d7d3840f953
      https://github.com/llvm/llvm-project/commit/5b5f59428cc6f28bdc37fbf5fc375d7d3840f953
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-04-06 (Wed, 06 Apr 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [DAGCombiner] Replace call getSExtOrTrunc with a truncate. NFC

The extend case should never occur. The sign extend would be an
arbitrary choice, remove it to avoid confusion.


  Commit: e13a44b46046431ee6e3139b5ea79818d2321a1e
      https://github.com/llvm/llvm-project/commit/e13a44b46046431ee6e3139b5ea79818d2321a1e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-04-06 (Wed, 06 Apr 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp-mask.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp-mask.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vsext-vp-mask.ll
    A llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vzext-vp-mask.ll
    A llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll

  Log Message:
  -----------
  [RISCV] Add lowering for vp.sext and vp.zext.

Including mask vector inputs.

Reviewed By: frasercrmck, rogfer01

Differential Revision: https://reviews.llvm.org/D123150


Compare: https://github.com/llvm/llvm-project/compare/1342b861a3d6...e13a44b46046