[all-commits] [llvm/llvm-project] 19e523: [AArch64][InstCombine] Fold MLOAD and zero extensi...

[Allen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 19e523514714688e4eb6588925eab079997e21a6
      https://github.com/llvm/llvm-project/commit/19e523514714688e4eb6588925eab079997e21a6
  Author: zhongyunde <zhongyunde at huawei.com>
  Date:   2022-04-06 (Wed, 06 Apr 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll

  Log Message:
  -----------
  [AArch64][InstCombine] Fold MLOAD and zero extensions into MLOAD

Accord the discussion in D122281, we missing an ISD::AND combine for MLOAD
because it relies on BuildVectorSDNode is fails for scalable vectors.
This patch is intend to handle that, so we can circle back the type MVT::nxv2i32

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D122703