[all-commits] [llvm/llvm-project] edb452: rev16 instruction is being generated for a half wo...
bipmis via All-commits
all-commits at lists.llvm.org
Tue Apr 5 05:43:41 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: edb452020569c070f7a7b00a3c12504020b5df21
https://github.com/llvm/llvm-project/commit/edb452020569c070f7a7b00a3c12504020b5df21
Author: Biplob Mishra <biplob.mishra at arm.com>
Date: 2022-04-05 (Tue, 05 Apr 2022)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-rev.ll
Log Message:
-----------
rev16 instruction is being generated for a half word byte swap on a 32-bit input as a bswap+rotr. This is not true for a 64-bit input.
This patch implements the rev16 instruction for a AArch64 backend for a half word byte swap on a 64-bit input.
Differential Revision: https://reviews.llvm.org/D122643
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