[all-commits] [llvm/llvm-project] b3851e: [RISCV] Add VL patterns for vfwmul/vfwadd/vfwsub

[WangLian via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b3851e99315248e14a63a66866085f6aeac05fe0
      https://github.com/llvm/llvm-project/commit/b3851e99315248e14a63a66866085f6aeac05fe0
  Author: Lian Wang <Lian.Wang at streamcomputing.com>
  Date:   2022-03-31 (Thu, 31 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll

  Log Message:
  -----------
  [RISCV] Add VL patterns for vfwmul/vfwadd/vfwsub

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D122369