[all-commits] [llvm/llvm-project] d660c0: [RISCV] Optimize LI+SLT to SLTI+XORI for immediate...

[LiqinWeng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d660c0d7938f415188277ced580eab24fc8e7809
      https://github.com/llvm/llvm-project/commit/d660c0d7938f415188277ced580eab24fc8e7809
  Author: Liqin Weng <Liqin.Weng at streamcomputing.com>
  Date:   2022-03-29 (Tue, 29 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/double-fcmp.ll
    M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/float-fcmp.ll
    M llvm/test/CodeGen/RISCV/i32-icmp.ll
    M llvm/test/CodeGen/RISCV/select-constant-xor.ll
    M llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/xaluo.ll

  Log Message:
  -----------
  [RISCV] Optimize LI+SLT to SLTI+XORI for immediates in specific range

This transform will reduce one GPR.

Reviewed By: craig.topper, benshi001

Differential Revision: https://reviews.llvm.org/D122051