[all-commits] [llvm/llvm-project] 4ae974: [Disassember][NFCI] Use strong type for instructio...

maksfb via All-commits all-commits at lists.llvm.org
Fri Mar 25 18:54:26 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4ae9745af19779b8dd693908b3071ea99a3ac1c0
      https://github.com/llvm/llvm-project/commit/4ae9745af19779b8dd693908b3071ea99a3ac1c0
  Author: Maksim Panchenko <maks at fb.com>
  Date:   2022-03-25 (Fri, 25 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
    M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
    M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
    M llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
    M llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp
    M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
    M llvm/lib/Target/Hexagon/HexagonDepDecoders.inc
    M llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
    M llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp
    M llvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
    M llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
    M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
    M llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
    M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
    M llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
    M llvm/utils/TableGen/FixedLenDecoderEmitter.cpp

  Log Message:
  -----------
  [Disassember][NFCI] Use strong type for instruction decoder

All LLVM backends use MCDisassembler as a base class for their
instruction decoders. Use "const MCDisassembler *" for the decoder
instead of "const void *". Remove unnecessary static casts.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D122245




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