[all-commits] [llvm/llvm-project] 6a094a: [InstCombine] SimplifyDemandedUseBits - remove ash...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6a094a62646907216ede3d3c22cb0ea0a2fc8cff
      https://github.com/llvm/llvm-project/commit/6a094a62646907216ede3d3c22cb0ea0a2fc8cff
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-03-25 (Fri, 25 Mar 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/ashr-demand.ll

  Log Message:
  -----------
  [InstCombine] SimplifyDemandedUseBits - remove ashr node if we only demand known sign bits

We already do this for SelectionDAG, but we're missing it here.

Noticed while re-triaging PR21929

Differential Revision: https://reviews.llvm.org/D122340