[all-commits] [llvm/llvm-project] dc58c3: [X86] Add additional 'add/sub single bit' patterns

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc58c3ba9379f2306bb82c88135c7c48bd161965
      https://github.com/llvm/llvm-project/commit/dc58c3ba9379f2306bb82c88135c7c48bd161965
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-03-24 (Thu, 24 Mar 2022)

  Changed paths:
    M llvm/test/CodeGen/X86/add-sub-bool.ll

  Log Message:
  -----------
  [X86] Add additional 'add/sub single bit' patterns

InstCombine can convert some cases to 'splat bit' sra(shl(x,y),bw-1) patterns which we need to handle as well