[all-commits] [llvm/llvm-project] 50a97a: [AArch64] Async unwind - function prologues

Thu Mar 24 09:17:56 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50a97aacacf689f838451439d913421d608e1bed
      https://github.com/llvm/llvm-project/commit/50a97aacacf689f838451439d913421d608e1bed
  Author: Momchil Velikov <momchil.velikov at arm.com>
  Date:   2022-03-24 (Thu, 24 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
    M llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
    M llvm/test/CodeGen/AArch64/aarch64-mops-consecutive.ll
    M llvm/test/CodeGen/AArch64/aarch64-mops.ll
    M llvm/test/CodeGen/AArch64/active_lane_mask.ll
    M llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
    M llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
    M llvm/test/CodeGen/AArch64/arm64-custom-call-saved-reg.ll
    M llvm/test/CodeGen/AArch64/arm64-fp128.ll
    M llvm/test/CodeGen/AArch64/arm64-large-frame.ll
    M llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
    M llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
    M llvm/test/CodeGen/AArch64/arm64-patchpoint.ll
    M llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
    M llvm/test/CodeGen/AArch64/cmp-select-sign.ll
    M llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll
    M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
    M llvm/test/CodeGen/AArch64/csr-split.ll
    M llvm/test/CodeGen/AArch64/fastcc.ll
    M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
    M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
    M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
    M llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
    M llvm/test/CodeGen/AArch64/framelayout-sve.mir
    M llvm/test/CodeGen/AArch64/framelayout-unaligned-fp.ll
    M llvm/test/CodeGen/AArch64/i128-math.ll
    M llvm/test/CodeGen/AArch64/isinf.ll
    M llvm/test/CodeGen/AArch64/large-stack-cmp.ll
    M llvm/test/CodeGen/AArch64/large-stack.ll
    M llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
    M llvm/test/CodeGen/AArch64/local_vars.ll
    M llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
    M llvm/test/CodeGen/AArch64/machine-outliner-throw2.ll
    M llvm/test/CodeGen/AArch64/neg-imm.ll
    M llvm/test/CodeGen/AArch64/peephole-and-tst.ll
    M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
    M llvm/test/CodeGen/AArch64/settag.ll
    M llvm/test/CodeGen/AArch64/shrink-wrapping-vla.ll
    M llvm/test/CodeGen/AArch64/sibling-call.ll
    M llvm/test/CodeGen/AArch64/split-vector-insert.ll
    M llvm/test/CodeGen/AArch64/stack-guard-remat-bitcast.ll
    M llvm/test/CodeGen/AArch64/stack-guard-sysreg.ll
    M llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
    M llvm/test/CodeGen/AArch64/sve-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
    M llvm/test/CodeGen/AArch64/sve-insert-element.ll
    M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
    M llvm/test/CodeGen/AArch64/sve-ldnf1.mir
    M llvm/test/CodeGen/AArch64/sve-ldstnt1.mir
    M llvm/test/CodeGen/AArch64/sve-pred-arith.ll
    M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
    M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
    M llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
    M llvm/test/CodeGen/AArch64/sve-trunc.ll
    M llvm/test/CodeGen/AArch64/swifterror.ll
    M llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
    M llvm/test/CodeGen/AArch64/unwind-preserved.ll
    M llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
    M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.generated.expected
    M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.nogenerated.expected

  Log Message:
  -----------
  [AArch64] Async unwind - function prologues

Re-commit of 32e8b550e5439c7e4aafa73894faffd5f25d0d05

This patch rearranges emission of CFI instructions, so the resulting
DWARF and `.eh_frame` information is precise at every instruction.

The current state is that the unwind info is emitted only after the
function prologue. This is fine for synchronous (e.g. C++) exceptions,
but the information is generally incorrect when the program counter is
at an instruction in the prologue or the epilogue, for example:

```
stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
mov	x29, sp
.cfi_def_cfa w29, 16
...
```

after the `stp` is executed the (initial) rule for the CFA still says
the CFA is in the `sp`, even though it's already offset by 16 bytes

A correct unwind info could look like:
```
stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
.cfi_def_cfa_offset 16
mov	x29, sp
.cfi_def_cfa w29, 16
...
```

Having this information precise up to an instruction is useful for
sampling profilers that would like to get a stack backtrace. The end
goal (towards this patch is just a step) is to have fully working
`-fasynchronous-unwind-tables`.

Reviewed By: danielkiss, MaskRay

Differential Revision: https://reviews.llvm.org/D111411