[all-commits] [llvm/llvm-project] b75399: [InstCombine] Add some initial SimplifyDemandedBit...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b75399a5e20f51b9d2fa89c68575e0564a8eede6
      https://github.com/llvm/llvm-project/commit/b75399a5e20f51b9d2fa89c68575e0564a8eede6
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-03-23 (Wed, 23 Mar 2022)

  Changed paths:
    A llvm/test/Transforms/InstCombine/ashr-demand.ll

  Log Message:
  -----------
  [InstCombine] Add some initial SimplifyDemandedBits tests for removal of ashr with sufficient signbits

We have this in SelectionDAG but it's missing in InstCombine

Based off PR21929 test case