[all-commits] [llvm/llvm-project] dd8b0f: [ARM][AArch64] generate subtarget feature flags

tmatheson-arm via All-commits all-commits at lists.llvm.org
Fri Mar 18 04:48:35 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dd8b0fecb95df7689aac26c2ef9ebd1f527f9f46
      https://github.com/llvm/llvm-project/commit/dd8b0fecb95df7689aac26c2ef9ebd1f527f9f46
  Author: Tomas Matheson <tomas.matheson at arm.com>
  Date:   2022-03-18 (Fri, 18 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64Subtarget.h
    M llvm/lib/Target/ARM/ARM.td
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMSubtarget.cpp
    M llvm/lib/Target/ARM/ARMSubtarget.h
    M llvm/utils/TableGen/SubtargetEmitter.cpp

  Log Message:
  -----------
  [ARM][AArch64] generate subtarget feature flags

This patch aims to reduce a lot of the boilerplate around adding new subtarget
features. From the SubtargetFeatures tablegen definitions, a series of calls to
the macro GET_SUBTARGETINFO_MACRO are generated in
ARM/AArch64GenSubtargetInfo.inc.  ARMSubtarget/AArch64Subtarget can then use
this macro to define bool members and the corresponding getter methods.

Some naming inconsistencies have been fixed to allow this, and one unused
member removed.

This implementation only applies to boolean members; in future both BitVector
and enum members could also be generated.

Differential Revision: https://reviews.llvm.org/D120906




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