[all-commits] [llvm/llvm-project] 214afc: [RISCV] Add patterns for vnsrl.wi and vnsra.wi ins...

[WangLian via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 214afc71161463e2701daf0187b7c3fe8a9f0b70
      https://github.com/llvm/llvm-project/commit/214afc71161463e2701daf0187b7c3fe8a9f0b70
  Author: Lian Wang <Lian.Wang at streamcomputing.com>
  Date:   2022-03-17 (Thu, 17 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/constant-folding.ll
    M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll

  Log Message:
  -----------
  [RISCV] Add patterns for vnsrl.wi and vnsra.wi instructions

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D121675