[all-commits] [llvm/llvm-project] 2e1067: [RISCV] Improve detection of when to skip (and (sr...
Craig Topper via All-commits
all-commits at lists.llvm.org
Wed Mar 16 14:56:04 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2e10671ec743c1ce5b237a6d8aff0c0c074a001d
https://github.com/llvm/llvm-project/commit/2e10671ec743c1ce5b237a6d8aff0c0c074a001d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2022-03-16 (Wed, 16 Mar 2022)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Improve detection of when to skip (and (srl x, c2) c1) -> (srli (slli x, c3-c2), c3) isel.
We have a special case to skip this transform if c1 is 0xffffffff
and x is sext_inreg in order to use sraiw+zext.w. But we were only
checking that we have a sext_inreg opcode, not how many bits are
being sign extended.
This commit adds a check that it is a sext_inreg from i32 so we know for
sure that an sraiw can be created.
Commit: 74cf8575f74ab6b0d9641e0e3acf3e9328a5e365
https://github.com/llvm/llvm-project/commit/74cf8575f74ab6b0d9641e0e3acf3e9328a5e365
Author: Craig Topper <craig.topper at sifive.com>
Date: 2022-03-16 (Wed, 16 Mar 2022)
Changed paths:
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
Log Message:
-----------
[RISCV] Remove stale FIXME from a test. NFC
Compare: https://github.com/llvm/llvm-project/compare/50f82e68470c...74cf8575f74a
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