[all-commits] [llvm/llvm-project] 766ca2: [PowerPC] Add missed VSX shuffles instead of Altiv...

[nemanja-ibm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 766ca2c59e21829b5c552ed4cf9b2dea1824b234
      https://github.com/llvm/llvm-project/commit/766ca2c59e21829b5c552ed4cf9b2dea1824b234
  Author: Nemanja Ivanovic <nemanjai at ca.ibm.com>
  Date:   2022-03-14 (Mon, 14 Mar 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
    M llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
    M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
    M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
    M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
    M llvm/test/CodeGen/PowerPC/load-and-splat.ll
    M llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll
    M llvm/test/CodeGen/PowerPC/perfect-shuffle.ll
    M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
    M llvm/test/CodeGen/PowerPC/pr25080.ll
    M llvm/test/CodeGen/PowerPC/pr27078.ll
    M llvm/test/CodeGen/PowerPC/pr47916.ll
    M llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
    M llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
    M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
    M llvm/test/CodeGen/PowerPC/urem-seteq-illegal-types.ll
    M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
    M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
    M llvm/test/CodeGen/PowerPC/vec_int_ext.ll
    M llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll
    M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
    M llvm/test/CodeGen/PowerPC/vsx.ll

  Log Message:
  -----------
  [PowerPC] Add missed VSX shuffles instead of Altivec ones

VSX introduced some permute instructions that are direct
replacements for Altivec ones except they can target all
the VSX registers. We have added code generation for most
of these but somehow missed the low/hi word merges (XXMRG[LH]W).
This caused some additional spills on some large
computationally intensive code.

This patch simply adds the missed patterns.