[all-commits] [llvm/llvm-project] 1e569e: [RISCV] Add CMOV isel pattern for (select (setgt X...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1e569e3b7b594f1e69dc5963b6ee4d821e7c68fb
      https://github.com/llvm/llvm-project/commit/1e569e3b7b594f1e69dc5963b6ee4d821e7c68fb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-03-04 (Fri, 04 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/select-cc.ll

  Log Message:
  -----------
  [RISCV] Add CMOV isel pattern for (select (setgt X, -1), Y, Z)

setgt X, -1 is the canonical form of setge X, 0. We can swap the
select operands and use setlt X, X0 when selecting CMOV. This
avoid materializing the -1 in a register.