[all-commits] [llvm/llvm-project] 0b75b3: [RISCV] Merge more rv32/rv64 vector intrinsic test...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b75b39a7038bbbeb8bf92ffba08e36f64782ca3
      https://github.com/llvm/llvm-project/commit/0b75b39a7038bbbeb8bf92ffba08e36f64782ca3
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-03-04 (Fri, 04 Mar 2022)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vaadd.ll
    R llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
    R llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vadd.ll
    R llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vasub.ll
    R llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vasubu.ll
    R llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmerge.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmfeq.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmfge.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmfgt.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmfle.ll
    R llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmflt.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmfne.ll
    R llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
    R llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmul.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmulh.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
    R llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vrsub.ll
    R llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsub.ll

  Log Message:
  -----------
  [RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the same content.

Use sed to convert iXLen to i32/i64 before running the test.