[all-commits] [llvm/llvm-project] e7c7b1: [mlir] Region/BranchOpInterface: Allow implicit ty...

[Jeff Niu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e7c7b16a849fb40169a708d27cb59747139ed8c7
      https://github.com/llvm/llvm-project/commit/e7c7b16a849fb40169a708d27cb59747139ed8c7
  Author: Mogball <jeffniu22 at gmail.com>
  Date:   2022-03-04 (Fri, 04 Mar 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/Async/IR/AsyncOps.td
    M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
    M mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
    M mlir/lib/Dialect/Async/IR/Async.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/SCF/SCF.cpp
    M mlir/lib/Dialect/Shape/IR/Shape.cpp
    M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
    M mlir/test/Transforms/control-flow-sink.mlir
    M mlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp

  Log Message:
  -----------
  [mlir] Region/BranchOpInterface: Allow implicit type conversions along control-flow edges

RegionBranchOpInterface and BranchOpInterface are allowed to make implicit type conversions along control-flow edges. In effect, this adds an interface method, `areTypesCompatible`, to both interfaces, which should return whether the types of corresponding successor operands and block arguments are compatible. Users of the interfaces, here on forth, must be aware that types may mismatch, although current users (in MLIR core), are not affected by this change. By default, type equality is used.

`async.execute` already has unequal types along control-flow edges (`!async.value<f32>` vs. `f32`), but it opted out of calling `RegionBranchOpInterface::verifyTypes` in its verifier. That method has now been removed and `RegionBranchOpInterface` will verify types along control edges by default in its verifier.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D120790