[all-commits] [llvm/llvm-project] 940d7c: [X86] SimplifyDemandedVectorElts - adjust X86ISD::...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 940d7cd59f88d78af443091e75a33a39ce098fbe
      https://github.com/llvm/llvm-project/commit/940d7cd59f88d78af443091e75a33a39ce098fbe
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-03-04 (Fri, 04 Mar 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-fshl-512.ll
    M llvm/test/CodeGen/X86/vector-fshr-512.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedVectorElts - adjust X86ISD::ANDNP demanded elts based off constant masks

Similar to what we already do in combineAndnp, if either operand is a constant then we can improve the demanded elts/bits.