[all-commits] [llvm/llvm-project] 42b4a6: [DAGCombine] Prevent illegal ISD::SPLAT_VECTOR ope...

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 42b4a6227e3e6ea6d3f62ee5a65c43e5d6e46ed3
      https://github.com/llvm/llvm-project/commit/42b4a6227e3e6ea6d3f62ee5a65c43e5d6e46ed3
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-03-04 (Fri, 04 Mar 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  [DAGCombine] Prevent illegal ISD::SPLAT_VECTOR operations post legalisation.

When triggered during operation legalisation the affected combine
generates a splat_vector that when custom lowered for SVE fixed
length code generation, results in the original precombine sequence
and thus we enter a legalisation/combine hang.

NOTE: The patch contains no tests because I observed this issue
only when combined with other work that might never become public.
The current way AArch64 lowers ISD::SPLAT_VECTOR meant a specific
test was not possible so I'm hoping the DAGCombiner fix can be seen
as obvious. The AArch64ISelLowering change is requirted to maintain
existing code quality.

Differential Revision: https://reviews.llvm.org/D120735