[all-commits] [llvm/llvm-project] 0f2612: [AArch64] Use first op of FADDPv* instead of impli...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0f261256e01f55aac04cf271f238e36fda8013d5
      https://github.com/llvm/llvm-project/commit/0f261256e01f55aac04cf271f238e36fda8013d5
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2022-03-03 (Thu, 03 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll

  Log Message:
  -----------
  [AArch64] Use first op of FADDPv* instead of implicit def.

This patch updates the FADDPv* patterns that only use the lower half of
the result register. For those patterns, the second operand does not
matter because its results won't be used.

Instead of introducing new implicit defs for those operands, just use
the first operand. The problem with using new implicit defs is that
register allocation can introduce unnecessary dependencies by using a
different register than the first operand.

For motivating cases, see the changes in the fadd_reduction_*_in_loop
cases. Without this change, the first faddp in the loop has an
unnecessary additional dependency through v0, which is also used for
a cross-iteration reduction.

This can noticeable impact performance. For slightly bigger loops,
this change can improve performance by 15%.

Reviewed By: sdesmalen, t.p.northover

Differential Revision: https://reviews.llvm.org/D120706