[all-commits] [llvm/llvm-project] 7dd7cb: [AArch64][SME] Add addsvl and addspl instructions

[Kai Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7dd7cb0487cad8ee0a101752419a991e79b91a4e
      https://github.com/llvm/llvm-project/commit/7dd7cb0487cad8ee0a101752419a991e79b91a4e
  Author: Hsiangkai Wang <hsiangkai at google.com>
  Date:   2022-02-28 (Mon, 28 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/MC/AArch64/SME/addspl-diagnostics.s
    A llvm/test/MC/AArch64/SME/addspl.s
    A llvm/test/MC/AArch64/SME/addsvl-diagnostics.s
    A llvm/test/MC/AArch64/SME/addsvl.s

  Log Message:
  -----------
  [AArch64][SME] Add addsvl and addspl instructions

This patch adds support for the following SME instructions:

  * ADDSPL, ADDSVL

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-12

Differential Revision: https://reviews.llvm.org/D120554


  Commit: b8e296cf6a35ebc33ff56ff8429c74c833dc7a1c
      https://github.com/llvm/llvm-project/commit/b8e296cf6a35ebc33ff56ff8429c74c833dc7a1c
  Author: Hsiangkai Wang <hsiangkai at google.com>
  Date:   2022-02-28 (Mon, 28 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/MC/AArch64/SME/rdsvl-diagnostics.s
    A llvm/test/MC/AArch64/SME/rdsvl.s

  Log Message:
  -----------
  [AArch64][SME] Add rdsvl instruction

This patch adds support for the following SME instruction:

  * RDSVL

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-12

Differential Revision: https://reviews.llvm.org/D120603


Compare: https://github.com/llvm/llvm-project/compare/4c901bf44719...b8e296cf6a35