[all-commits] [llvm/llvm-project] 370ebc: [DAG] Attempt to fold bswap(shl(x, c)) -> zext(bswa...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 370ebc9d9a573d6a0bcb0d7c3e0a57d55b7a7673
      https://github.com/llvm/llvm-project/commit/370ebc9d9a573d6a0bcb0d7c3e0a57d55b7a7673
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-02-24 (Thu, 24 Feb 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/load-combine-big-endian.ll
    M llvm/test/CodeGen/AArch64/load-combine.ll
    M llvm/test/CodeGen/X86/combine-bswap.ll
    M llvm/test/CodeGen/X86/load-combine.ll

  Log Message:
  -----------
  [DAG] Attempt to fold bswap(shl(x,c)) -> zext(bswap(trunc(shl(x,c-bw/2))))

If the shl is at least half the bitwidth (i.e. the lower half of the bswap source is zero), then we can reduce the shift and perform the bswap at half the bitwidth and just zero extend.

Based off PR51391 + PR53867

Differential Revision: https://reviews.llvm.org/D120192