[all-commits] [llvm/llvm-project] 719bac: [MIRParser] Diagnose too large align values in Mac...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 719bac55dff141c6f68fe3045f42b78a41e84d79
      https://github.com/llvm/llvm-project/commit/719bac55dff141c6f68fe3045f42b78a41e84d79
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2022-02-24 (Thu, 24 Feb 2022)

  Changed paths:
    M llvm/lib/CodeGen/MIRParser/MILexer.cpp
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
    A llvm/test/CodeGen/MIR/Generic/aligned-memoperands-err.mir
    A llvm/test/CodeGen/MIR/Generic/aligned-memoperands.mir
    M llvm/test/CodeGen/Mips/msa/emergency-spill.mir
    M llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
    M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir

  Log Message:
  -----------
  [MIRParser] Diagnose too large align values in MachineMemOperands

When parsing MachineMemOperands, MIRParser treated the "align" keyword
the same as "basealign". Really "basealign" should specify the
alignment of the MachinePointerInfo base value, and "align" should
specify the alignment of that base value plus the offset.

This worked OK when the specified alignment was no larger than the
alignment of the offset, but in cases like this it just caused
confusion:

    STW killed %18, 4, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 4, align 8)

MIRPrinter would never have printed this, with an offset of 4 but an
align of 8, so it must have been written by hand. MIRParser would
interpret "align 8" as "basealign 8", but I think it is better to give
an error and force the user to write "basealign 8" if that is what they
really meant.

Differential Revision: https://reviews.llvm.org/D120400

Change-Id: I7eeeefc55c2df3554ba8d89f8809a2f45ada32d8