[all-commits] [llvm/llvm-project] 55c181: Revert "[AArch64][GlobalISel] Optimize conjunction...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 55c181a6c786cfbfa8b7aabe0a8ba721a65b1445
      https://github.com/llvm/llvm-project/commit/55c181a6c786cfbfa8b7aabe0a8ba721a65b1445
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2022-02-21 (Mon, 21 Feb 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/arm64-ccmp.ll

  Log Message:
  -----------
  Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."

This reverts commit 2a46450849de6904fc64f9a65303b20ca7fc9dbd.

This triggers the following assertion in an internal project:

    Assertion failed: (VRegInfo[Reg.id()].first.is<const TargetRegisterClass
    *>() && "Register class not set, wrong accessor"), function getRegClass,
    file MachineRegisterInfo.h, line 646.

I'll work with the author directly to get a reproducer.