[all-commits] [llvm/llvm-project] f6ee45: [X86] Add some add reduction tests for values that...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6ee45e94391ef8cee67e2a4ad6d61c614985de9
      https://github.com/llvm/llvm-project/commit/f6ee45e94391ef8cee67e2a4ad6d61c614985de9
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-02-19 (Sat, 19 Feb 2022)

  Changed paths:
    A llvm/test/CodeGen/X86/vector-reduce-add-mask.ll

  Log Message:
  -----------
  [X86] Add some add reduction tests for values that are zero in the upper bits

This is an extension of some of the tests mentioned in Issue #42019 - we might be able to use PSADBW to add+zext 4 x bytes to i64 that can then be reduced