[all-commits] [llvm/llvm-project] f51004: [CodeGen] Remove unneeded regex escaping in FileCh...

Jay Foad via All-commits all-commits at lists.llvm.org
Fri Feb 18 08:11:15 PST 2022 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f510045d820b6bdc2a20832fd1a35aff47f964f8
      https://github.com/llvm/llvm-project/commit/f510045d820b6bdc2a20832fd1a35aff47f964f8
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2022-02-18 (Fri, 18 Feb 2022)

  Changed paths:
    M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
    M llvm/test/CodeGen/AArch64/aarch64-interleaved-ld-combine.ll
    M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
    M llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll
    M llvm/test/CodeGen/AArch64/arm64-code-model-large-darwin.ll
    M llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
    M llvm/test/CodeGen/AArch64/arm64-dagcombiner-load-slicing.ll
    M llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
    M llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll
    M llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
    M llvm/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll
    M llvm/test/CodeGen/AArch64/arm64-promote-const.ll
    M llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll
    M llvm/test/CodeGen/AArch64/arm64-vector-ldst.ll
    M llvm/test/CodeGen/AArch64/arm64-virtual_base.ll
    M llvm/test/CodeGen/AArch64/cmpxchg-O0.ll
    M llvm/test/CodeGen/AArch64/dllimport.ll
    M llvm/test/CodeGen/AArch64/fast-isel-atomic.ll
    M llvm/test/CodeGen/AArch64/fast-isel-branch-cond-mask.ll
    M llvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll
    M llvm/test/CodeGen/AArch64/fast-isel-runtime-libcall.ll
    M llvm/test/CodeGen/AArch64/misched-fusion-addr-tune.ll
    M llvm/test/CodeGen/AArch64/misched-fusion-addr.ll
    M llvm/test/CodeGen/AArch64/stack-guard-reassign.ll
    M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
    M llvm/test/CodeGen/AArch64/stack-protector-target.ll
    M llvm/test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll
    M llvm/test/CodeGen/AArch64/stack_guard_remat.ll
    M llvm/test/CodeGen/AArch64/stgp.ll
    M llvm/test/CodeGen/AArch64/swiftself.ll
    M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
    M llvm/test/CodeGen/AArch64/tagged-globals-static.ll
    M llvm/test/CodeGen/AArch64/win-tls.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.id.ll
    M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
    M llvm/test/CodeGen/AMDGPU/add.i16.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/add_i128.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
    M llvm/test/CodeGen/AMDGPU/always-uniform.ll
    M llvm/test/CodeGen/AMDGPU/amdpal.ll
    M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
    M llvm/test/CodeGen/AMDGPU/and.ll
    M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
    M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
    M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
    M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/build_vector.ll
    M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
    M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
    M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
    M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
    M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
    M llvm/test/CodeGen/AMDGPU/commute-compares.ll
    M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
    M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/ctpop64.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
    M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
    M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
    M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
    M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
    M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
    M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
    M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/fract.f64.ll
    M llvm/test/CodeGen/AMDGPU/function-args.ll
    M llvm/test/CodeGen/AMDGPU/function-call-relocs.ll
    M llvm/test/CodeGen/AMDGPU/global-constant.ll
    M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
    M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/global_smrd.ll
    M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
    M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
    M llvm/test/CodeGen/AMDGPU/inline-asm.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
    M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
    M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
    M llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll
    M llvm/test/CodeGen/AMDGPU/merge-stores.ll
    M llvm/test/CodeGen/AMDGPU/missing-store.ll
    M llvm/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
    M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
    M llvm/test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
    M llvm/test/CodeGen/AMDGPU/operand-folding.ll
    M llvm/test/CodeGen/AMDGPU/or.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
    M llvm/test/CodeGen/AMDGPU/private-element-size.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
    M llvm/test/CodeGen/AMDGPU/read_register.ll
    M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
    M llvm/test/CodeGen/AMDGPU/rel32.ll
    M llvm/test/CodeGen/AMDGPU/returnaddress.ll
    M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
    M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
    M llvm/test/CodeGen/AMDGPU/select-opt.ll
    M llvm/test/CodeGen/AMDGPU/select-vectors.ll
    M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
    M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
    M llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll
    M llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll
    M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
    M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
    M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
    M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
    M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
    M llvm/test/CodeGen/AMDGPU/sub.i16.ll
    M llvm/test/CodeGen/AMDGPU/sub.ll
    M llvm/test/CodeGen/AMDGPU/trunc.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
    M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
    M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
    M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
    M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
    M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
    M llvm/test/CodeGen/AMDGPU/wave32.ll
    M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
    M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
    M llvm/test/CodeGen/AMDGPU/xor.ll
    M llvm/test/CodeGen/AMDGPU/zero_extend.ll
    M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
    M llvm/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll
    M llvm/test/CodeGen/ARM/Windows/tls.ll
    M llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
    M llvm/test/CodeGen/ARM/cmpxchg-O0.ll
    M llvm/test/CodeGen/ARM/constantpool-promote-ldrh.ll
    M llvm/test/CodeGen/ARM/fast-isel-call.ll
    M llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
    M llvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll
    M llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll
    M llvm/test/CodeGen/ARM/fast-isel-vararg.ll
    M llvm/test/CodeGen/ARM/fast-isel.ll
    M llvm/test/CodeGen/ARM/fp16-load-store.ll
    M llvm/test/CodeGen/ARM/i64_volatile_load_store.ll
    M llvm/test/CodeGen/ARM/indirectbr.ll
    M llvm/test/CodeGen/ARM/jump-table-tbh.ll
    M llvm/test/CodeGen/ARM/ldrd.ll
    M llvm/test/CodeGen/ARM/memcpy-ldm-stm.ll
    M llvm/test/CodeGen/ARM/setjmp_longjmp.ll
    M llvm/test/CodeGen/ARM/stack-guard-tls.ll
    M llvm/test/CodeGen/ARM/stack_guard_remat.ll
    M llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
    M llvm/test/CodeGen/ARM/swiftself.ll
    M llvm/test/CodeGen/ARM/thumb-big-stack.ll
    M llvm/test/CodeGen/ARM/thumb_indirect_calls.ll
    M llvm/test/CodeGen/ARM/vector-DAGCombine.ll
    M llvm/test/CodeGen/ARM/vld3.ll
    M llvm/test/CodeGen/ARM/win32-ssp.ll
    M llvm/test/CodeGen/Thumb/stack_guard_remat.ll
    M llvm/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll
    M llvm/test/CodeGen/Thumb2/stack_guard_remat.ll
    M llvm/test/CodeGen/XCore/epilogue_prologue.ll
    M llvm/test/CodeGen/XCore/scavenging.ll
    M llvm/test/CodeGen/XCore/varargs.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
    M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll

  Log Message:
  -----------
  [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC.

Take advantage of D117117 to simplify all {{\[}} to [ and {{\]}} to ].

Differential Revision: https://reviews.llvm.org/D117298

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