[all-commits] [llvm/llvm-project] b47be4: [mlir][Vector] Switch ExtractOp to the declarative...
Benjamin Kramer via All-commits
all-commits at lists.llvm.org
Fri Feb 18 03:00:58 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: b47be47ac2871b6f63f4acbaea8fa5e311f1ecc5
https://github.com/llvm/llvm-project/commit/b47be47ac2871b6f63f4acbaea8fa5e311f1ecc5
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2022-02-18 (Fri, 18 Feb 2022)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][Vector] Switch ExtractOp to the declarative assembly format
This is a bit awkward since ExtractOp allows both `f32` and
`vector<1xf32>` results for a scalar extraction. Allow both, but make
inference return the scalar to make this as NFC as possible.
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