[all-commits] [llvm/llvm-project] a83e08: [mlir][Vector] Add InferTypeOpInterface to vector ...

[Benjamin Kramer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a83e08b4506d971c724135519d1509570c570889
      https://github.com/llvm/llvm-project/commit/a83e08b4506d971c724135519d1509570c570889
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2022-02-18 (Fri, 18 Feb 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][Vector] Add InferTypeOpInterface to vector dialect and remove the now redundant builders


  Commit: f0dd818be389e193cbe5817996e434696f37a702
      https://github.com/llvm/llvm-project/commit/f0dd818be389e193cbe5817996e434696f37a702
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2022-02-18 (Fri, 18 Feb 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Dialect/Vector/invalid.mlir

  Log Message:
  -----------
  [mlir][Vector] Switch ShuffleOp to the declarative assembly format

This also requires implementing return type deduction.


Compare: https://github.com/llvm/llvm-project/compare/c6a3225bb03b...f0dd818be389