[all-commits] [llvm/llvm-project] c46aab: RegAllocGreedy: Fix last chance recolor assert in ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c46aab01c002b7a04135b8b7f1f52d8c9ae23a58
      https://github.com/llvm/llvm-project/commit/c46aab01c002b7a04135b8b7f1f52d8c9ae23a58
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-02-17 (Thu, 17 Feb 2022)

  Changed paths:
    M llvm/lib/CodeGen/RegAllocGreedy.cpp
    A llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
    A llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll

  Log Message:
  -----------
  RegAllocGreedy: Fix last chance recolor assert in impossible case

This example is not compilable without handling eviction of specific
subregisters. Last chance recoloring was deciding it could try
evicting an overlapping superregister, which doesn't help make any
progress. The LiveIntervalUnion would then assert due to an
overlapping / identical range when trying the new assignment.

Unfortunately this is also producing a verifier error after the
allocation fails. I've seen a number of these, and not sure if we
should just start deleting the function on error rather than trying to
figure out how to put together valid MIR.

I'm not super confident this is the right place to fix this. I also
have a number of failing testcases I need to fix by handling partial
evictions of superregisters.