[all-commits] [llvm/llvm-project] b78471: [RISCV] Add the passthru operand for RVV nomask bi...
Zakk Chen via All-commits
all-commits at lists.llvm.org
Tue Feb 15 18:39:56 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: b7847199044e46e0a138586e6f525ef071b3e1f8
https://github.com/llvm/llvm-project/commit/b7847199044e46e0a138586e6f525ef071b3e1f8
Author: Zakk Chen <zakk.chen at sifive.com>
Date: 2022-02-15 (Tue, 15 Feb 2022)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/test/CodeGen/RISCV/riscv-attr-builtin-alias.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vaadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vasub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfabs.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmax.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmin.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfneg.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfrsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsgnj.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1down.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfslide1up.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmul-eew64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnclip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrgather.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1down.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslide1up.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsmul-eew64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwcvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfslide1down.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmul-eew64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vslide1down.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul-eew64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c
M clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c
M clang/utils/TableGen/RISCVVEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-vslide1down-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vfrsub.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll
M llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll
Log Message:
-----------
[RISCV] Add the passthru operand for RVV nomask binary intrinsics.
The goal is support tail and mask policy in RVV builtins.
We focus on IR part first.
If the passthru operand is undef, we use tail agnostic, otherwise
use tail undisturbed.
Add passthru operand for VSLIDE1UP_VL and VSLIDE1DOWN_VL to support
i64 scalar in rv32.
The masked VSLIDE1 would only emit mask undisturbed policy regardless
of giving mask agnostic policy until InsertVSETVLI supports mask agnostic.
Reviewed by: craig.topper, rogfer01
Differential Revision: https://reviews.llvm.org/D117989
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