[all-commits] [llvm/llvm-project] 478c23: [RISCV] Fix incorrect extend type in vwmulsu combine.
Craig Topper via All-commits
all-commits at lists.llvm.org
Sat Feb 12 12:48:37 PST 2022
Author: Craig Topper <craig.topper at sifive.com>
Date: 2022-02-12 (Sat, 12 Feb 2022)
[RISCV] Fix incorrect extend type in vwmulsu combine.
While matching widening multiply, if we matched an extend from i8->i32,
i16->i64 or i8->i64, we need to reintroduce a narrower extend. If we're
matching a vwmulsu we need to use a sext for op0 and a zext for op1.
This bug exists in LLVM 14 and will need to be backported.
Differential Revision: https://reviews.llvm.org/D119618
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