[all-commits] [llvm/llvm-project] c58be8: [SVE] Prefer zero-extending loads when lowering IS...

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c58be8572001253870e0c268585cb1322dcaa74b
      https://github.com/llvm/llvm-project/commit/c58be8572001253870e0c268585cb1322dcaa74b
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-02-10 (Thu, 10 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
    M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
    M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
    M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
    M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-split-load.ll

  Log Message:
  -----------
  [SVE] Prefer zero-extending loads when lowering ISD::EXTLOAD.

The decision is perhaps arbitrary but I figure zeroing has no
dependency on the value being loaded.

Differential Revision: https://reviews.llvm.org/D119327